Balanced gyrator and devices including the balanced gyrator

ABSTRACT

A balanced gyrator comprises interconnected pairs of single-ended inverting class AB transconductors (TC 1  to TC 4 ) fabricated from MOSFETs together with common mode feedback circuits ( 26 ) connected between balanced inputs ( 18, 19 ) and outputs ( 22, 23 ). Peaking of the frequency response resulting from distortion due to the creation of a high frequency parasitic feedthrough path in the transconductors is overcome by the provision in each of the transconductors (TC 1  to TC 4 ) of a non-reciprocal feedback capacitance (Cf) which renders the feedthrough capacitance reciprocal thereby neutralising the feedthrough capacitance of the gyrator. The devices include a filter (FIG.  8 , not shown) and a transceiver (FIG.  10 , not shown).

TECHNICAL FIELD

The present invention relates to a balanced gyrator and to devices, suchas gyrator filters and integrated transceivers including at least one ofthe balanced gyrators.

BACKGROUND ART

Gyrator filters are frequently used in low power channel filters forwireless transceivers. Currently there is an interest in being able tofabricate complete integrated transceivers/receivers in MOS technology.Channel filters may comprise MOS gyrators which suffer from capacitivefeedforward which is the result of non-reciprocal gate-drain capacitancein its MOSTs and this is results in filters with a distorted highfrequency response. Gyrators comprise transconductor feedback pairs andideally transconductors linearly convert an input voltage into an outputcurrent with both input and output ports presenting an infiniteimpedance. A typical transconductor feedback pair is shown in FIG. 1 inwhich one transconductor 10 is inverting and the other transconductor 12is non-inverting.

FIG. 2 shows an embodiment of a balanced class AB transconductor whichcomprises two pairs of MOS transistors, each pair comprising a p-typetransistor 14 and a n-type transistor 16 having their drain electrodescoupled together, their source electrodes connected to respective supplyvoltage lines V_(dda) and V_(ss), their gate electrodes connectedtogether with a common junction of each pair of gate electrodes beingconnected to a respective input terminal 18, 20, and their respectiveinterconnected drain electrodes coupled to output terminals 22, 24. Acommon mode feedback (cmfb) circuit 26 is coupled between the inputterminals 18, 20 to provide dc stability.

A problem with a balanced gyrator such as that shown in FIG. 3 using twobalanced class AB transconductors 10, 12 with the output connections ofthe feedback transconductor 12 crossed-over is that the capacitancesoccurring naturally between the drains and gates of the transistorsforming the transconductors create a high frequency parasiticfeedthrough path and this produces high frequency peaking in thefilter's frequency response. This may be mitigated by using very smalltransistors in the transconductors but in practice this results in verypoor matching.

Referring to FIGS. 4 and 5 this problem may be understood by initiallyconsidering the capacitances between the gate g and the drain d of aMOSFET as shown in FIG. 4. Y. P. Tsividis, “Operation and Modeling ofthe MOS transistor”, McGraw-Hill, ISBN 0-07-065381, pp. 370 to 372points out that transistors which operate in saturation SAT, see FIG. 5,such as those of the transconductors used in the balanced gyrators towhich the present invention relates, have intrinsic capacitances Cgs,Cdg and Cgd given by: $\begin{matrix}{C_{gs} = {{- \frac{\delta\quad Q_{g}}{\delta\quad V_{s}}} = {\frac{2}{3} \cdot C_{ox}}}} & (1) \\{C_{dg} = {{- \frac{\delta\quad Q_{d}}{\delta\quad V_{g}}} = {\frac{4}{15} \cdot C_{ox}}}} & (2) \\{C_{gd} = {{- \frac{\delta\quad Q_{g}}{\delta\quad V_{d}}} = 0}} & (3)\end{matrix}$

The MOSFET also has an extrinsic capacitance, C_(gdol), due togate-drain overlap and stray fields between the gate and the draincontacts.

The transconductor has a feedforward capacitance, C_(ff), and a feedbackcapacitance, C_(fb), where: $\begin{matrix}{C_{ff} = {{C_{dg} + C_{gdol}} = {{\frac{2}{5} \cdot C_{gs}} + C_{gdol}}}} & (4) \\{C_{fb} = {{C_{gd} + C_{gdol}} = C_{gdol}}} & (5)\end{matrix}$

Clearly the capacitance is non-reciprocal, i.e. C_(ff)≠C_(fb), andsimple neutralisation techniques using simple (reciprocal) capacitancesare useless.

DISCLOSURE OF INVENTION

A first object of the present invention is to mitigate the effects ofthe high parasitic feedthrough path on the performance of a balancedgyrator.

A second object of the present invention is to avoid or reducedistortion in the frequency response of a filter implemented usingbalanced gyrators.

According to one aspect of the present invention there is provided abalanced gyrator comprising a plurality of interconnected feedforwardand feedback MOS single-ended transconductors, balanced inputs andoutputs, common mode feedback means coupled respectively between thebalanced inputs and outputs, and means for providing each of thetransconductors with a non-reciprocal feedback capacitance for renderingreciprocal the feedthrough capacitance of the transconductor therebyneutralising the feedthrough capacitance of the gyrator.

According to a second aspect of the present invention there is provideda filter comprising at least one stage including first and second shuntcapacitors and a series inductance stage, characterised in that theseries inductance stage comprises first and second balanced gyrators anda shunt capacitance and in that each of the first and second gyratorscomprises a plurality of interconnected feedforward and feedback MOSsingle-ended transconductors, balanced inputs and outputs, common modefeedback means coupled respectively between the balanced inputs andoutputs, and means for providing each of the transconductors with anon-reciprocal feedback capacitance for rendering reciprocal thefeedthrough capacitance of the transconductor thereby neutralising thefeedthrough capacitance of the gyrator.

According to a third aspect of the present invention there is provided atransceiver having at least one channel filter, the or each channelfilter comprising a plurality of balanced gyrators, each balancedgyrator including a plurality of interconnected feedforward and feedbackMOS single-ended transconductors, balanced inputs and outputs, commonmode feedback means coupled respectively between the balanced inputs andoutputs, and means for providing each of the transconductors with anon-reciprocal feedback capacitance for rendering reciprocal thefeedthrough capacitance of the transconductor thereby neutralising thefeedthrough capacitance of the gyrator.

According to a further aspect of the invention there is provided adevice comprising a balanced gyrator in accordance with the first aspectof the invention or a filter in accordance with the second aspect of theinvention or a transceiver in accordance with the third aspect of theinvention. Such a device may be, for example, an integrated circuit.

BRIEF DESCRIPTION OF DRAWINGS

The present invention will now be described, by way of example, withreference to the accompanying drawings, wherein:

FIG. 1 is a block schematic diagram showing a gyrator comprising afeedback pair of transconductors,

FIG. 2 is a diagram of a balanced class AB transconductor comprising MOStransistor pairs and a common-mode feedback circuit,

FIG. 3 is a block schematic diagram of a balanced gyrator blockcomprising two balanced transconductors as shown in FIG. 2,

FIG. 4 is a diagram of a MOSFET showing the various intrinsic andextrinsic capacitances between pairs of electrodes,

FIG. 5 is a graph illustrating the intrinsic capacitances of thetransistors of the transconductor in various operating regions,

FIG. 6 is a schematic circuit diagram of a single ended transconductorwith an added feedback circuit,

FIG. 7 is a block schematic circuit diagram of a balanced gyrator blockcomprising four of the single ended transconductors shown in FIG. 6 andcommon mode feedback stages,

FIG. 8 is a block schematic diagram of a fifth order gyrator filter,

FIG. 9 illustrates, in broken lines, the frequency response of a fifthorder gyrator filter in which the gyrator feedforward capacitances arenot neutralised and, in full lines, the frequency response of the fifthorder gyrator filter in which the gyrator feedforward capacitances havebeen neutralised, and

FIG. 10 is a block schematic diagram of a transceiver having a polyphasefilter employing balanced gyrators made in accordance with the presentinvention.

In the drawings the same reference numerals have been used to indicatecorresponding features.

MODES FOR CARRYING OUT THE INVENTION

As FIGS. 1 to 5 have already been described in the preamble of thespecification they will not be described again.

Referring to FIG. 6 the illustrated single ended transconductorcomprises pMOS and nMOS transistors 14, 16, respectively, whose drainelectrodes are connected together and whose source electrodes areconnected to respective current supply rails V_(dda) and V_(ss). Thegates of these transistors are connected to a common input terminal 18.

The gate-source capacitance 30 of the pMOS transistor 14, C_(gsp), isshown in broken lines between the gate of the transistor 14 and thesupply line V_(dda). Similarly the gate-source capacitance 32 of thenMOS transistor 16, C_(gsn), is shown in broken lines between the gateof the transistor 16 and the supply line V_(ss). The capacitance C_(dgt)between the interconnected drains and interconnected gates of thetransistors 14, 16 is shown in broken lines.

The illustrated single ended transconductor further comprises an addedfeedback circuit C_(f). This feedback circuit C_(f) comprises a sourcefollower S, pMOS transistor 36, which is biased by a current source 1,pMOS transistor 34, and driven at its gate by the voltage at thetransconductor output 22. The source follower output is connected to thetransconductor input 18 by a capacitor C_(p) formed from the oxidecapacitance of a MOS transistor 38. In the illustrated embodiment thetransistor 38 is a PMOS transistor and if the transistor cuts-off due tosignal polarity reversal the capacitance is fairly constant because thechannel is replaced by the back-gate.

In a non-illustrated embodiment a reverse connected nMOS transistor(with its gate connected to the transconductor output 22 and commonsource-drain connected to the input 18) could be used to make thecapacitor C_(p). In that case, it should be biased permanently in itstriode region using the source follower V_(gs), transistor 36.

Reverting to the embodiment as illustrated, when a signal voltage isapplied to the transconductor input 18, current flows by way of thecapacitance C_(dgt) to the transconductor output 22 and by way of thecapacitor C_(p) to the source follower S which routes it harmlessly tothe V_(ss) rail. So: $\begin{matrix}{C_{ff} = {C_{dgt} = {{\frac{2}{5}\left( {C_{gsp} + C_{gsn}} \right)} + C_{gdolp} + C_{gdoln}}}} & (6)\end{matrix}$

When a signal voltage is applied to the transconductor output 22,current flows by way of the capacitance C_(gdt) and the capacitor C_(p)to the transconductor input 18. So:C _(fb) =C _(gdt) +C _(p) =C _(gdolp) +C _(gdoln) +C _(p)  (7)

If C_(p) is designed so that: $\begin{matrix}{{C_{p} = {\frac{2}{5}\left( {C_{gsp} + C_{gsn}} \right)}}{{then}\text{:}}} & (8) \\{C_{ff} = {C_{fb} = C_{f}}} & (9)\end{matrix}$i.e. the feedthrough capacitance is now reciprocal.

FIG. 7 is a block schematic diagram of a balanced gyrator comprisingfour single-ended transconductors TC1 to TC4 of the type shown in FIG. 6in which the reciprocal capacitance is modelled by the capacitor C_(f)and common mode feedback (cmfb) circuits 26 connected across the inputand output, respectively. The outputs of the transconductors TC1 and TC4are coupled to inputs to the transconductors TC3 and TC2, respectively.As the balanced inputs 18, 19 and outputs 22, 23 always experience equaland opposite signal voltages, the currents fed through the capacitorsC_(f) in the forward transconductor pair are always cancelled by theequal and opposite currents fed through the capacitors C_(f) in thefeedback transconductor pair. In other words, the balanced gyratorfeedthrough capacitors are self-neutralised. The cmfb circuits 26 serveto provide dc stabilisation.

The illustrated balanced gyrator circuit has been found to give asignificant improvement to the frequency response of a Gm-C channelfilter.

FIG. 8 shows a fifth order bandpass filter. The filter is aninductance/capacitance filter consisting of an input resistance R_(IN),and output resistance R_(OUT), shunt capacitors C1, C3 and C5 and seriesinductances L1, L2. The inductance L1 is implemented by balancedgyrators BG1, BG2 and a capacitor C2 and the inductance L2 by balancedgyrators BG3, BG4 and a capacitor C4, the balanced gyrators BG3, BG4being constructed in the same manner as the balanced gyrators BG1, BG2.As the balanced gyrators BG1 to BG4 have been described with referenceto FIG. 7, then in the interests of brevity they will not be describedagain.

This improvement in the frequency response is illustrated in FIG. 9 inwhich the broken line frequency response 40 shows the effect of thefeedthrough capacitors not being reciprocal, as demonstrated by equation(9) above, and the full line frequency response 42 illustrates theimprovement when the capacitors are reciprocal.

The value of the capacitance C_(p) (FIG. 6) may be determinedempirically by simulating the filter containing balanced gyrators havingsingle-ended transconductors of the type shown in FIG. 6 together withthe cmfb circuits 26 and varying the size of the transistors 38 untilthe desired performance is achieved.

FIG. 10 illustrates a transceiver in which a polyphase channel filter CFin the receiver section Rx comprises a Gm-C filter based on the fifthorder bandpass filter shown in FIG. 8. More particularly the polyphasechannel filter CF comprises two fifth order bandpass filters, one foreach of the quadrature related phases, with the addition of cross branchbalanced gyrators coupling corresponding capacitors, that is C1, C1; C2,C2 and so on, to create extra susceptance.

An antenna 50 is coupled to a low noise amplifier (LNA) 52 in thereceiver section Rx. An output of the LNA 52 is coupled by way of asignal divider 54 to first inputs of quadrature related mixers 56, 58. Alocal oscillator signal generated by a signal generator 60 is applied toa second input of the mixer 56 and, by way of a ninety degree phaseshifter 62, to a second input of the mixer 58. Quadrature relatedoutputs 1, Q, respectively, from the mixers 56, 58 are applied to thepolyphase channel filter CF which passes the wanted quadrature relatedsignals to respective analogue-to-digital converters 62, 64. The digitaloutputs from the A-to-D converters 62, 64 are applied to a digitaldemodulator 66 which provides an output signal on a terminal 68.

The transmitter Tx comprises a digital modulator 70 which includes adigital-to-analogue converter (not shown) providing an analogue signalto a mixer 72 for frequency up-conversion to the required transmissionfrequency. A power amplifier 74 amplifies the frequency up-convertedsignal and supplies it to the antenna 50.

The transceiver including the channel filter CF may be fabricated as anintegrated circuit using known low voltage CMOS processes.

In the present specification and claims the word “a” or “an” precedingan element does not exclude the presence of a plurality of suchelements. Further, the word “comprising” does not exclude the presenceof other elements or steps than those listed.

INDUSTRIAL APPLICABILITY

Electronic circuits comprising a gyrator, such as gyrator filters andintegrated transceivers including gyrators.

1. A balanced gyrator comprising a plurality of interconnectedfeedforward and feedback MOS single-ended transconductors, balancedinputs and outputs, common mode feedback means coupled respectivelybetween the balanced inputs and outputs, and means for providing each ofthe transconductors with a non-reciprocal feedback capacitance forrendering reciprocal the feedthrough capacitance of the transconductorthereby neutralising the feedthrough capacitance of the gyrator.
 2. Abalanced gyrator as claimed in claim 1, wherein each of the single-endedtransconductors comprises a pMOS transistor and a nMOS transistor havingdrain electrodes connected together, source electrodes connected torespective first and second power supply lines, gate electrodes coupledto an input, and a junction of the interconnected drain electrodesconnected to an output, characterised in that the non-reciprocalfeedback capacitance comprises a capacitive device coupled between theinput and output.
 3. A balanced gyrator as claimed in claim 2,characterised in that the capacitive device comprises a MOS transistorhaving its source and drain electrodes connected together and a gateelectrode, in that the gate electrode is coupled to the transconductorinput and in that a source follower transistor couples theinterconnected source and drain electrodes to the transconductor output.4. A balanced gyrator as claimed in claim 3, characterised in that thecapacitance value of the capacitive device is related to the sum of thegate-source capacitances of the pMOS and nMOS transistors.
 5. A balancedgyrator as claimed in claim 4, characterised in that the capacitancevalue is substantially equal to:${\frac{2}{5}\left( {C_{gsp} + C_{gsn}} \right)},$ where C_(gsp) andC_(gsn), respectively are the gate-source capacitances of the pMOS andnMOS transistors.
 6. A filter comprising at least one stage includingfirst and second shunt capacitors and a series inductance stage,characterised in that the series inductance stage comprises first andsecond balanced gyrators and a shunt capacitance and in that each of thefirst and second gyrators comprises a plurality of interconnectedfeedforward and feedback MOS single-ended transconductors, balancedinputs and outputs, common mode feedback means coupled respectivelybetween the balanced inputs and outputs, and means for providing each ofthe transconductors with a non-reciprocal feedback capacitance forrendering reciprocal the feedthrough capacitance of the transconductorthereby neutralising the feedthrough capacitance of the gyrator.
 7. Atransceiver having at least one channel filter, the or each channelfilter comprising a plurality of balanced gyrators, each balancedgyrator including a plurality of interconnected feedforward and feedbackMOS single-ended transconductors, balanced inputs and outputs, commonmode feedback means coupled respectively between the balanced inputs andoutputs, and means for providing each of the transconductors with anon-reciprocal feedback capacitance for rendering reciprocal thefeedthrough capacitance of the transconductor thereby neutralising thefeedthrough capacitance of the gyrator.
 8. A transceiver as claimed inclaim 7, wherein each of the single-ended transconductors comprises aPMOS transistor and a nMOS transistor having drain electrodes connectedtogether, source electrodes connected to respective first and secondpower supply lines, gate electrodes coupled to an input, and a junctionof the interconnected drain electrodes connected to an output,characterised in that the non-reciprocal feedback capacitance comprisesa capacitive device coupled between the input and output.
 9. Atransceiver as claimed in claim 8, characterised in that the capacitivedevice comprises a MOS transistor having its source and drain electrodesconnected together and a gate electrode, in that the gate electrode iscoupled to the transconductor input and in that a source followertransistor couples the interconnected source and drain electrodes to thetransconductor output.
 10. A transceiver as claimed in claim 8,characterised in that the capacitance value of the capacitive device isrelated to the sum of the gate-source capacitances of the pMOS and nMOStransistors.
 11. An integrated circuit comprising a filter as claimed inclaim
 6. 12. An integrated circuit comprising a transceiver as claimedin claim 1.